The present disclosure relates generally to a programmable logic device. More particularly, the present disclosure relates to a logic array block (LAB) in the programmable logic device that uses look-up table (LUT)-based random access memory (RAM).
This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present disclosure, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present disclosure. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
Programmable logic fabric of an integrated circuit device may be programmed to implement a programmable circuit design to perform a wide range of functions and operations. The programmable logic fabric may include logic array blocks (LABs) that have lookup tables (LUTs) that can be configured to operate as different logic elements based on the configuration data programmed into memory cells in the LAB s. These memory cells store may store configuration data and be referred to as configuration random access memory (CRAM).
Some types of LABs, which may be referred to as memory logic array blocks (MLABs), can operate in either a lookup-table mode (LUT-mode) or a memory mode such as random access memory mode (RAM-mode) or shift-register (DLM) mode. MLABs have memory cells which may be referred to generally as lookup table random access memory (LUTRAM). When operating in the lookup-table mode, the LUTRAM memory cell(s) of an MLAB store configuration data that define the operation of the LUT of the MLAB. Thus, in the lookup-table mode, the MLAB can be programmed to represent combinational logic of the programmable circuit design, in similar fashion to other LABs. When operating in the memory mode, the LUTRAM memory cell(s) of the MLAB operate as cells of random access memory or as cells of a shift register that hold user data. Thus, in the memory mode, the MLAB operates like random access memory or a shift register. By selectively storing either configuration data or user data, the MLABs may operate either as configurable logic or as a cell of user-accessible memory depending on the programmable circuit design that is in use. This may allow programmable circuit designs to take advantage of the MLAB memories to store user data when the MLABs are not used as combinational logic of the programmable circuit design.
It may be useful to verify the integrity of a programmable circuit design that has been programmed into the LABs (which includes MLABs operating in LUT-mode) of the programmable logic fabric. Since the programmable circuit design is based on the configuration data programmed into the LABs, any deviations from the expected values of the configuration data may suggest that the programmable logic fabric has been corrupted or tampered with. If the programmable logic fabric has been corrupted or tampered with, the programmable logic design may not perform as expected. Accordingly, error detection/correction may be performed on the cells of the programmable logic fabric. The configuration data stored in the CRAM memory cells of the LABs (and the LUTRAM memory cells of the MLABs operating in LUT-mode) may be static for any particular programmable circuit design and, as such, should not change during operation of the programmable logic fabric configured with the programmable circuit design. An error may thus be properly detected/corrected when the configuration data stored in an LAB or MLAB memory cell changes (without authorization and/or acknowledgement). However, user data stored in an MLAB memory cell is dynamic and may regularly change. As such, an error may be detected when the user data stored in the memory cell changes, and the user data may be rewritten due to error correction. Without distinguishing between configuration data and user data stored in the MLAB memory cells, changes in the data stored in the MLAB memory cells may be improperly and repeatedly detected without acknowledging whether the changes are to the configuration data or user data.